Chair of Computer Architecture

University Freiburg
Tobias Faller Publications Talks

Tobias Faller

PhD Student

AddressTobias Faller
Technische Fakultät
University of Freiburg
Georges Köhler Allee, Gebäude 51
79110 Freiburg im Breisgau
Germany
 
OfficeBuilding 51
(map)Room 01..030
+49 761 203 8140
fallert@cs.uni-freiburg.de

Biographical Sketch

Publications

2024

Armin Biere, Tobias Faller, Katalin Fazekas, Mathias Fleury, Nils Froleyks, Florian Pollitt. CaDiCaL, Gimsatul, IsaSAT and Kissat Entering the SAT Competition 2024 (not reviewed).
[ paper | bibtex ]

Armin Biere, Tobias Faller, Katalin Fazekas, Mathias Fleury, Nils Froleyks, Florian Pollitt. Hardware Equivalence Checking Problems Submitted to the SAT Competition 2024 (not reviewed).
[ paper | bibtex ]

Armin Biere, Tobias Faller, Katalin Fazekas, Mathias Fleury, Nils Froleyks, Florian Pollitt. CaDiCaL 2.0.
[ paper | bibtex ]

2023

Nikolaos I Deligiannis, Tobias Faller, Iacopo Guglielminetti, Riccardo Cantoro, Bernd Becker, Matteo Sonza Reorda. Automatic Identification of Functionally Untestable Cell-Aware Faults in Microprocessors
[ paper | bibtex | researchgate ]

Tobias Faller, Nikolaos I Deligiannis, Markus Schwörer, Matteo Sonza Reorda, Bernd Becker. Constraint-based automatic SBST generation for RISC-V processor families
[ paper | bibtex | researchgate ]

Jens Anders, Pablo Andreu, Bernd Becker, Steffen Becker, Riccardo Cantoro, Nikolaos I Deligiannis, Nourhan Elhamawy, Tobias Faller, Carles Hernandez, Nele Mentens, Mahnaz Namazi Rizi, Ilia Polian, Abolfazl Sajadi, Mathias Sauer, Denis Schwachhofer, Matteo Sonza Reorda, Todor Stefanov, Ilya Tuzov, Stefan Wagner, Nuša Zidarič. A Survey of Recent Developments in Testability, Safety and Security of RISC-V Processors
[ paper ]

Nikolaos I Deligiannis, Tobias Faller, Zhou Chenghan, Riccardo Cantoro, Bernd Becker, Matteo Sonza Reorda. Automating the Generation of Functional Stress Inducing Stimuli for Burn-In Testing
[ paper | bibtex | researchgate ]

Nikolaos Ioannis Deligiannis, Tobias Faller, Riccardo Cantoro, Tobias Paxian, Bernd Becker, Matteo Sonza Reorda. Automating the generation of programs maximizing the repeatable constant switching activity in microprocessor units via MaxSAT
[ paper | bibtex | researchgate ]

Wolfgang Ecker, Milos Krstic, Markus Ulbricht, Andreas Mauderer, Eyck Jentzsch, Andreas Koch, Bastian Koppelmann, Wolfgang Müller, Babak Sadiye, Niklas Bruns, Rolf Drechsler, Daniel Mueller-Gritschneder, Jan Schlamelcher, Kim Grüttner, Jörg Bormann, Wolfgang Kunz, Reinhold Heckmann, Gerhard Angst, Ralf Wimmer, Bernd Becker, Tobias Faller, Paul Palomero Bernardo, Oliver Bringmann, Johannes Partzsch, Christian Mayr. Scale4Edge-Scaling RISC-V for Edge Applications
[ paper | poster | bibtex | elib ]

2022

Nikolaos I Deligiannis, Tobias Faller, Josie E Rodriguez Condia, Riccardo Cantoro, Bernd Becker, Matteo Sonza Reorda. Using Formal Methods to Support the Development of STLs for GPUs
[ paper | bibtex | researchgate ]

2021

Nikolaos I Deligiannis, Riccardo Cantoro, Tobias Faller, Tobias Paxian, Bernd Becker, Matteo Sonza Reorda. Effective SAT-based solutions for generating functional sequences maximizing the sustained switching activity in a pipelined processor
[ paper | bibtex | researchgate ]

Tobias Faller, Philipp Scholl, Tobias Paxian, Bernd Becker. Towards SAT-based SBST generation for RISC-V cores
[ paper | bibtex | researchgate ]

Talks

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