Welcome to the Chair of Computer Architecture

News

• Test-of-Time Award at SAT’25 for our SAT’05 paper
  Effective Preprocessing in SAT through Variable and Clause Elimination
  by Niklas Eén and Armin Biere

• Best Paper Award at SAT’25
  Streamlining Distributed SAT Solver Design
  by Dominik Schreiber, Niccolò Rigi-Luperti, Armin Biere

• Distinguished CAV’25 paper
  Introducing Certificates to the Hardware Model Checking Competition
  Nils Froleyks, Emily Yu, Mathias Preiner, Armin Biere, Keijo Heljanko

• Invited talk Dr. Daniela Kaufmann
  Taming the Polynomial Explosion: A New Approach to Algebraic Circuit Verification
  Tuesday, December 3, 2024, 17:00 - 18:00, TF SR 00-34 Geb. 51

• Kissat wins three gold medals in the main track of the SAT Competition 2024

• Herbrand Award in 2024 goes to Armin Biere

• Hardware Model Checking Competition 2024 (HWMCC’24) with FMCAD’24

  archived news

Mission

We develop methods and tools to ensure the correctness, reliability and robustness of circuits and systems,
from initial design through manufacturing and deployment.

Our focus is on using logic, more precisely symbolic techniques and tools for precise automated reasoning,
including SAT, model checking and theorem proving.

These techniques have broad application not only in hardware and software development and in verification
but also in optimization and particularly artificial intelligence.